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Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual vii
Contents
40 82559 Configuration Byte Map ...................................................................................................65
41 82557 Dual-Port FIFO Settings - Transmit .................................................................................66
42 82557 Dual-Port FIFO Settings - Receive ..................................................................................67
43 82558 and 82559 Dual-Port FIFO Settings - Transmit ...............................................................67
44 82558 and 82559 Dual-Port FIFO Settings - Receive ................................................................68
45 Extended Statistics Functionality................................................................................................72
46 Pre-amble Length .......................................................................................................................75
47 82558 B-step Configuration Block ARP Frame IP Address........................................................76
48 82558 B-step ARP Frame IP Address Mapping .........................................................................77
49 Full Duplex Functionality.............................................................................................................79
50 Dump Data Bytes (0-79).............................................................................................................92
51 Dump Data Dwords (20-148)......................................................................................................95
52 RFD Status Bit Descriptions .....................................................................................................101
53 Actual Count in Header RFD ....................................................................................................102
54 CU Control Commands: Actions at Acceptance Time..............................................................107
55 CU Activities Performed at the End of Execution .....................................................................107
56 RU Control Commands: Actions at Acceptance Time..............................................................108
57 Flow Control Frame Format......................................................................................................112
58 Flow Control Configuration Bits ................................................................................................115
59 MDI Register Set ......................................................................................................................118
60 82555 MDI Register Set ...........................................................................................................118
61 24-bit OUI Identification Number ..............................................................................................121
62 MDI Identification Registers 2 and 3: PHY ID Encoding...........................................................121
63 LED Switch Control...................................................................................................................130
64 Technology Ability Field Bit Assignments.................................................................................131
65 Technology Priority...................................................................................................................131
66 Fixed Wake-up Configuration Bits ............................................................................................143
67 82559 Port Commands.............................................................................................................150
68 Dump Data Structure................................................................................................................151
69 IPCB Structure..........................................................................................................................155
70 IP Activation Bits (Byte 13) .......................................................................................................155
71 IP Activation Bits (Byte 12) .......................................................................................................155
72 IPCB Fields...............................................................................................................................156
73 IPCB Structure Checksum Offload ...........................................................................................158
74 IPCB Structure Large Send ......................................................................................................162