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Example 2: Noncontinuous Frame Display for 525/60 Format
A-17Video Port Configuration ExamplesSPRU629
/* –––––––––––––– */
/* enable display */
/* –––––––––––––– */
/* set VDEN to enable display for loop–back */
VP_FSETH(vpBDisplayHandle, VDCTL, VDEN, VP_VDCTL_VDEN_ENABLE);
/* clear BLKDIS in VD_CTL to enable display DMA events */
VP_FSETH(vpBDisplayHandle, VDCTL, BLKDIS, VP_VDCTL_BLKDIS_CLEAR);
}
/*–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– */
/* Function : VPDispIsr */
/* Description : This display ISR clears FRMD to continue display */
/* in this non–continuous mode and also clears other */
/* status bits. */
/*–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– */
interrupt void VPDispIsr(void)
{
Uint32 vpis = 0;
vpis = VP_RGETH(vpDisplayHandle , VPIS);
if(vpis & _VP_VPIS_DCMP_MASK) /* frame display complete */
{
/* Clear frame complete bit FRMD to continue display */
VP_FSETH(vpDisplayHandle , VDSTAT, FRMD,
VP_VDSTAT_FRMD_CLEAR);
/* clear DCMPA to enable next frame complete interrupts */
VP_FSETH(vpDisplayHandle , VPIS, DCMP, VP_VPIS_DCMP_CLEAR);
displayFrameCount++; /* increment displayed frame count */
}
if(vpis & _VP_VPIS_DUND_MASK) /* underrun error */
{
dispUnderrun++;
/* clear DUND to enable next underrun interrupts */
VP_FSETH(vpDisplayHandle , VPIS, DUND, VP_VPIS_DUND_CLEAR);
}
}