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EMAC Functional Architecture
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2.7.1 Pacing Block
In simple terms, interrupt pacing represents delaying the initial EMAC events to CPU interrupt based on
certain criteria. The pacing block is the basic building block for the interrupt pacing operation. One of the
motivations for interrupt pacing is that during Ethernet operation, hundreds or thousands of interrupts are
generated per second for packets transmitted or received and interrupt pacing relieves the CPU of the
burden of processing every single interrupt. This block provides time-based or count-based pacing of
interrupts, in any combination. In addition, this block supports reprogramming of timer value and count
value without hardware/software race condition and also facilitates use of the same timer and count
values for the next event period.
The EVT_IN is the pulse interrupt from EMAC. This is forwarded to timed-delay and divide by N state
machines (see Figure 15). The state machine outputs are combined and sent out as EVT_OUT. PS_TICK
is the clock tick from the prescalar block. The prescaler block forwards this signal to all the pacing blocks.
Figure 15. Pacing Block
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C6472/TCI6486 EMAC/MDIO SPRUEF8F–March 2006–Revised November 2010
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