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MuxOneNAND2G(KFM2G16Q2A-DEBx)
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FLASH MEMORY
MuxOneNAND4G(KFN4G16Q2A-DEBx)
6.16 Block Erase Operation Timing
See AC Characteristics Tables 5.5, 5.7 and 5.9.
NOTE :
1) AA = Address of address register
CA = Address of command register
ECD = Erase Command
EMA = Address of memory to be erased
SA = Address of status register
AA* = Address of Start Address1 Register(for Flash Block Address)
PMB = DFS & FBA(Flash Block address) of memory to be programmed next time
2) For “In progress” and “complete” status, refer to status register.
3) Status reads in this figure is asynchronous read, but status read in synchronous mode is also supported.
Erase Command Sequence
WE
CE
CLK
tAVDP
tAAVDS
tAAVDH
tDS
tDH
tCH
tWPL
tWPH
tWC
ECDCAEMAAA
A/DQ0:
A/DQ15
OE
Read Status Data
V
IL
tWEA
INT
tCS
AVD
tCER
RDY
Hi-Z
bit
tBERS1
SA SA
In
Progress
Completed
tCER
tCEZ
tCEZ
AA
*
PMB