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MuxOneNAND2G(KFM2G16Q2A-DEBx)
- 53 -
FLASH MEMORY
MuxOneNAND4G(KFN4G16Q2A-DEBx)
NOTE :
- BI: Bad block Information
>Host can use complete spare area except BI and ECC code area. For example,
Host can write data to Spare area buffer except for the area controlled by ECC logic at program operation.
>In case of ‘with ECC’ mode, MuxOneNAND automatically generates ECC code for both main and spare data of memory during program operation,
but does not update ECC code to spare bufferRAM during load operation.
>When loading/programming spare area, spare area BufferRAM address(BSA) and BufferRAM sector count(BSC) is chosen via Start buffer register
as it is.
Buf.
Word
Address
Byte
Address
F E D C B A 9 8 7 6 5 4 3 2 1 0
DataS 1_3
8048h 10090h BI
8049h 10092h Managed by Internal ECC logic
804Ah 10094h Reserved for the future use Managed by Internal ECC logic
804Bh 10096h Reserved for the current and future use
804Ch 10098h
ECC Code for Main area data (2
nd
) ECC Code for Main area data (1
st
)
804Dh 1009Ah
ECC Code for Spare area data (1
st
) ECC Code for Main area data (3
rd
)
804Eh 1009Ch Reserved for the future use
ECC Code for Spare area data (2
nd
)
804Fh 1009Eh Free Usage