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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 130 SMSC LAN9311/LAN9311i
DATASHEET
Figure 9.5 illustrates the TX command structure for this example, and also shows how data is passed
to the TX Data FIFO.
Figure 9.5 TX Example 1
TX Command 'A'
031
TX Command 'B'
Pad DWORD 1
7-Byte Data Start Offset
10-Byte
End Padding
79-Byte Payload
Buffer End Alignment = 1
Data Start Offset = 7
First Segment = 1
Last Segment = 0
Buffer Size = 79
Packet Length = 111
TX Command 'A'
031
TX Command 'B'
10-Byte
End Offset Padding
15-Byte Payload
Buffer End Alignment = 1
Data Start Offset = 0
First Segment = 0
Last Segment = 0
Buffer Size = 15
Packet Length = 111
TX Command 'A'
031
TX Command 'B'
Buffer End Alignment = 1
Data Start Offset = 10
First Segment = 0
Last Segment = 1
Buffer Size = 17
Packet Length = 111
10-Byte
Data Start Offset
TX Command 'A'
TX Command 'B'
TX Command 'A'
TX Command 'B'
TX Command 'A'
TX Command 'B'
NOTE: Extra bytes
between buffers are
not transmitted
Data Written to the
Memory Mapped
TX Data FIFO Port
Data Passed to the
TX Data FIFO
5-Byte End Padding
17-Byte Payload Data
TX Command 'A'
TX Command 'B'
TX Command 'A'
TX Command 'A'
1B
79-Byte Payload
15-Byte Payload
17-Byte Payload