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1 Hardware Overview 1.2 System Block Diagram
❑ Chipset
This gate array has the following elements and functions.
• North Bridge (Intel 855PME (MCH-M, B-step))
− Pentium-M processor System Bus support
− DRAM Controller : DDR333/DDR266/DDR200 support
− AGP Interface (AGP R2.0, AGP x 4 modes)
− Hub Link Interface
− 593-ball 37.5mmx37.5mm FC-BGA Package
• South Bridge (Intel 82801DBM (ICH4-M))
− PCI slot
− IDE controller
− DMA controller
− USB host interface
− USB 2.0 host controller
− UHCI host controller
− Interrupt controller
− SM Bus interface
− ACPI Power management
− Firmware Hub interface
− Low Pin count (LPC) interface
− Real time clock
− AC’97 Rev. 2.3 interface
− Alert ON LAN (AOL)
− 421-pin 31mmx31mm BGA Package
❑ PC card controller (Texas Instruments-made PCI7411)
− PCI Interface (PCI Rev. 2.3)
− PC Card Controller
− IEEE1394 Controller
− Flash Media Controller
− SD Host Controller
QOSMIO F10 Maintenance Manual (960-498) 1-7