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2.4 System Board Troubleshooting 2 Troubleshooting Procedures
Table 2-4 Debug port (Boot mode) error status (3/9)
D port status Inspection items Details
Initialization of MCHM
Initialization of ICH4M.D31.Func0
Initialization of ICH4M.D31.Func1
Initialization of USB.Func0,1,2,7
Initialization of ICH4M.D31.Func3
Initialization of ICH4M.D31.Func5
Initialization of H/W (before DRAM
recognition)
Initialization of TI
(F100h)
Initialization of PIT channel 1
(Setting the refresh interval to “30µs”)
Checking DRAM type and size (at
cold boot)
When unsupported memory connected,
beeps and halts.
When DRAM size = 0, halts.
F101h
Testing the stack area of SM-RAM When it can not be used, halts.
Configuring cache memory
Permission of L1/L2 cache
memory
Checking the access of a CMOS
(Only in Cold Boot)
When error detected, halts
Examining the battery level of
CMOS
Checksum check of CMOS
Initializing data in CMOS (1)
Setting up IRT status
(Setting of boot status and IRT busy flag,
The rest bits are 0)
F102h
Storing the size of DRAM
F103h
Branch of resuming( only in Cold
Boot)
When a CMOS error is detected, it does
not resume.
If “resume status code” is not set, no
resume occurs.
2-22 QOSMIO F10 Maintenance Manual (960-498)