Avaya P550R Switch User Manual


 
Cajun P550R/P880/P882 Switch User Guide
Introduction to the Cajun P550R/P880/P882 Switch
1-9
Manages the address cache and the Spanning Tree Protocol
(STP)
PowerPC 860 RISC processor
Memory: 4 MB Flash, 8 MB DRAM, 128 KB NVRAM
Multiple memory configurations (Table1-1):
Real-time clock
Out-of-band console: 10BASE-T & RS-232
RMON support
SNMP management agent
Dot matrix display
Layer 3
Supervisor
Module
The layer 3 Supervisor module requires a faster CPU and more
memory. Also, unlike the layer 2 supervisor, the layer 3 supervisor is
part of the path that some packets take through the system. To
accomplish this, the layer 3 supervisor requires faster data transfer
to and from the switching fabric.
The layer 3 supervisor module features are:
PowerPC 750 (RISC) processor
Memory: 4 MB Flash, 64 MB DRAM, 128 KB NVRAM, 512
KB cache
Multiple memory configurations (refer to Table1-2)
Table 1-1. Multiple Memory Configuration
DIMM/SIMM Number of Modules Total Memory
8 MB 1 8 MB
16 MB 1 16 MB
32 MB 1 32 MB
Table 1-2. Multiple Memory Configuration
DIMM/
SIMM
Number of
Modules
Total Memory
32 MB 1 32 MB
32 MB 2 64 MB