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PMC/PCI Interface: PCI9060ES Initialization
10002367-02 PmT1 and PmE1 User’s Manual
7-5
Table 7-5: PCI9060ES Local Configuration Register Initialization
Hex Value
Local Bus
1
Address (hex):
1. These registers are initialized by the serial EEPROM.
Register:
at the
PCI9060ES:
byte-swapped
at the CPU: Notes:
C100,0080 Local Address Space 0
Range
FF800008 080080FF Memory space reads are prefetchable. The
PCI-to-local range is set to 2MB of on-card
DRAM.
C100,0084 Local Space 0 Local
Base Address
00000001 01000000 PCI-to-local remap address is 0000,0000
16
.
Enable PCI-to-local accesses.
C100,0088 Local Arbitration 00400000 00004000 Enable PCI direct slave locked sequences.
C100,008C Big/Little Endian
Descriptor
00000000 00000000 Little endian ordering.
C100,0090 Local Expansion ROM
Range (PCI to local
bus)
00000000 00000000 Disable local expansion ROM.
C100,0094 BREQo Control 00000011 11000000 Slave BREQo delay is 24 clocks. Enable local
bus BREQo.
C100,0098 Local Bus Region
Descriptor to PCI to
Local Accesses
F8030043 430003F8 Memory space local bus width is 32 bits.
There are no memory space internal wait
states. Enable memory space ready input.
Disable bterm input and bursting.
2
The
slave PCI write mode is one. Target retry
delay is 120 clocks.
2. Bursting on the MPC860P’s local bus must remain disabled (i.e., bit 24 of the PCI9060ES’s local register at offset 0x98 must be zero).
C100,009C Local Range
(Direct Master to PCI)
E0000000 000000E0 Local-to-PCI range is 512 MB.
C100,00A0 Local Bus Base
Address (Direct
Master to PCI
memory)
40000000 00000040 PCI memory space is mapped at
4000,0000
16
.
C100,00A4 Local Base Address
(Direct Master to PCI
I/O/CFG)
60000000 00000060 PCI I/O and configuration space is mapped
at 6000,0000
16
.
C100,00A8 PCI Base Address
(Remap) (Direct
Master to PCI)
00000007 07000000 Local-to-PCI remap address is 0000,0000
16
.
Enable master I/O, memory accesses, and
lock input.
C100,00AC PCI Configuration
Address (Direct
Master to PCI IO/CFG)
00000000 00000000 Local-to-PCI accesses are not converted to
PCI configuration cycles.