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Table 6-1 PCI/PCI-X I/O Paths (continued)
EFI Device PathHP-UX Device PathLocation
(as
viewed
from
rear of
chassis)
Function
with Path
Slot
Acpi(HWP0002,0)/Pci(1*)0/0/1/*Right-most
special
slot
(private)
Core I/O
iLO 2 MP
Core
I/O
board
Acpi(HWP0002,0)/Pci(2*)0/0/2/*Right-most
special
slot
(private)
Core I/O
USB
Acpi(HWP0002,0)/Pci(4*)0/0/4/*Right-most
special
slot
(private)
Core I/O
VGA
(optional)
1 The Core I/O LAN may be in slot 10 depending upon the configuration.
PCI/PCI-X/PCIe IOBP
The following describes configuration requirements for slots one through ten on the
PCI/PCI-X/PCIe I/O backplane:
• PCI-X slots 1 and 2 are reserved for use by the core I/O cards PCI-X SAS core I/O cards and
the Gigabit Ethernet LAN core I/O card. Slots 1 and 2 are not hot-pluggable. Install only
supported PCI-X SAS and LAN core I/O cards in slots 1 and 2. Depending upon the number
and type of SAS core I/O cards installed on the system, the Gigabit Ethernet LAN core I/O
card may be installed in slot 10.
• Slots 3 and 4 are swtiched PCIe x8. PCIe slots 3 and 4 are used for the PCIe SAS Core I/O
cards, but are public slots. If the PCIe core I/O is not installed, these slots are available for
other PCIe I/O cards.
• Slots 5 and 6 are nonswitched PCIe x8.
• Slots 7 and 8 are nonshared slots. The maximum speed for cards in slots 7 and 8 is PCI-X
133 MHz.
• Slots 9 and 10 are shared slots. These two slots are limited by bus mode or frequency-related
incompatibilities.
IMPORTANT: Slots 9 and 10 on the PCI/PCI-X/PCIe I/O backplane have the same configuration
limitations as slots 9 and 10 on the PCI/PCI-X I/O backplane. See “Shared Slots” (page 197) for
more information.
PCI/PCI-X/PCIe Card Path Logging Some PCI/PCI-X/PCIe failures result in I/O path logging.
These paths help to indicate the source of the error and can be included in the error message or
logged into console or event logs. Table 6-2 (page 197) describes the PCI/PCI-X/PCIe I/O paths
for the server.
196 Removing and Replacing Server Components