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Protocols — PCI Bus Support
Version 1.10 12/01/02 12-61
EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
If this bit is set, then the PCI memory cycles between 0xA0000 and 0xBFFFF are
forwarded to the PCI controller. This bit is used to forward memory cycles for a VGA
frame buffer on a PCI controller. If this bit is set, then the PCI Host Bus Controller and
all the PCI to PCI bridges between the PCI Host Bus Controller and the PCI Controller
are configured to forward these PCI Memory cycles.
EFI_PCI_IO_ATTRIBUTE_VGA_IO
If this bit is set, then the PCI I/O cycles in the ranges 0x3B0-0x3BB and 0x3C0-0x3DF
are forwarded to the PCI controller using a 10-bit address decoder on address bits 0..9.
Address bits 10..15 are not decoded, and the address bits 16..31 must be zero. This bit is
used to forward I/O cycles for a VGA controller to a PCI controller. If this bit is set, then
the PCI Host Bus Controller and all the PCI to PCI bridges between the PCI Host Bus
Controller and the PCI Controller are configured to forward these PCI I/O cycles. Since
EFI_PCI_IO_ATTRIBUTE_VGA_IO also includes the I/O range described by
EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_ IO, the
EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO bit is ignored if
EFI_PCI_IO_ATTRIBUTE_VGA_IO is set.
EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO
If this bit is set, then the PCI I/O cycles in the ranges 0x1F0-0x1F7 and 0x3F6-0x3F7 are
forwarded to a PCI controller using a 10-bit address decoder on address bits 0..9.
Address bits 10..15 are not decoded, and address bits 16..31 must be zero. This bit is
used to forward I/O cycles for a Primary IDE controller to a PCI controller. If this bit is
set, then the PCI Host Bus Controller and all the PCI to PCI bridges between the PCI
Host Bus Controller and the PCI Controller are configured to forward these PCI I/O
cycles.
EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO
If this bit is set, then the PCI I/O cycles in the ranges 0x170-0x177 and 0x376-0x377 are
forwarded to a PCI controller using a 10-bit address decoder on address bits 0..9.
Address bits 10..15 are not decoded, and address bits 16..31 must be zero. This bit is
used to forward I/O cycles for a Secondary IDE controller to a PCI controller. If this bit
is set, then the PCI Host Bus Controller and all the PCI to PCI bridges between the PCI
Host Bus Controller and the PCI Controller are configured to forward these PCI I/O
cycles.
EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE
If this bit is set, then this platform supports changing the attributes of a PCI memory
range so that the memory range is accessed in a write combining mode. This bit is used
to improve the write performance to a memory buffer on a PCI controller. By default,
PCI memory ranges are not accessed in a write combining mode.