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Extensible Firmware Interface Specification
19-4 12/01/02 Version 1.10
Unlike the general-purpose registers, the VM dedicated registers have specific purposes. There are
two dedicated registers: the instruction pointer (IP), and the flags (Flags) register. Specialized
instructions provide access to the dedicated registers. These instructions reference the particular
dedicated register by its assigned index value. Table 19-2 lists the dedicated registers and their
corresponding index values.
Table 19-2. Dedicated VM Registers
Index Register Description
FLAGS
Bit Description
0 C = Condition code
1 SS = Single step
2..63 Reserved
0
1 IP Points to current instruction
2..7 Reserved Not defined
The VM Flags register contains VM status and context flags. Table 19-3 lists the descriptions of
the bits in the Flags register.
Table 19-3. VM Flags Register
Bit Flag Description
0 C Condition code. Set to 1 if the result of the last compare was true,
or set to 0 if the last compare was false. Used by conditional JMP
instructions.
1 S Single-step. If set, causes the VM to generate a single-step
exception after executing each instruction. The bit is not cleared
by the VM following the exception.
2..63 - Reserved
The VM IP register is used as an instruction pointer and holds the address of the currently
executing EBC instruction. The virtual machine will update the IP to the address of the next
instruction on completion of the current instruction, and will continue execution from the address
indicated in IP. The IP register can be moved into any general-purpose register (R0-R7). Data
manipulation and data movement instructions can then be used to manipulate the value. The only
instructions that may modify the IP are the JMP
, CALL, and RET instructions. Since the
instruction set is designed to use words as the minimum instruction entity, the low order bit (bit 0)
of IP is always cleared to 0. If a JMP, CALL, or RET instruction causes bit 0 of IP to be set to 1,
then an alignment exception occurs.