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Extensible Firmware Interface Specification
12-62 12/01/02 Version 1.10
EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED
If this bit is set, then this platform supports changing the attributes of a PCI memory
range so that the memory range is accessed in a cached mode. By default, PCI memory
ranges are accessed noncached.
EFI_PCI_IO_ATTRIBUTE_IO
If this bit is set, then the PCI device will decode the PCI I/O cycles that the device is
configured to decode.
EFI_PCI_IO_ATTRIBUTE_MEMORY
If this bit is set, then the PCI device will decode the PCI Memory cycles that the device is
configured to decode.
EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
If this bit is set, then the PCI device is allowed to act as a bus master on the PCI bus.
EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE
If this bit is set, then this platform supports changing the attributes of a PCI memory
range so that the memory range is disabled, and can no longer be accessed. By default, all
PCI memory ranges are enabled.
EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE
If this bit is set, then the PCI controller is an embedded device that is typically a
component on the system board. If this bit is clear, then this PCI controller is part of an
adapter that is populating one of the systems PCI slots.
EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM
If this bit is set, then the PCI option ROM described by the RomImage and RomSize
fields is not from ROM BAR of the PCI controller. If this bit is clear, then the
RomImage and RomSize fields were initialized based on the PCI option ROM found
through the ROM BAR of the PCI controller.
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
If this bit is set, then the PCI controller is capable of producing PCI Dual Address Cycles,
so it is able to access a 64-bit address space. If this bit is not set, then the PCI controller is
not capable of producing PCI Dual Address Cycles, so it is only able to access a 32-bit
address space.