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Extensible Firmware Interface Specification
19-8 12/01/02 Version 1.10
19.5.3 Indirect with Index Operands
When an indirect with index operand is specified, the address of the operand is computed by adding
the contents of a register to a decoded natural index that is included in the instruction. Typically
with indexed addressing, the base address will be loaded in the register and an index value will be
used to indicate the offset relative to this base address. Indexed addressing takes the form
@R
1
(+n,+c)
where:
• R
1
is one of the general-purpose registers (R0-R7) which contains the base address
• +n is a count of the number of “natural” units offset. This portion of the total offset is
computed at runtime as (n * sizeof (VOID *))
• +c is a byte offset to add to the natural offset to resolve the total offset
The values of n and c can be either positive or negative, though they must both have the same sign.
These values get encoded in the indexes associated with EBC instructions as shown in Table 19-4.
Indexes can be 16-, 32-, or 64-bits wide depending on the instruction. An example of indirect with
index syntax would be:
ADD32 R1, @R2 (+1, +8)
This instruction would take the address in register R2, add (8 + 1 * sizeof (VOID *)), read the
32-bit value at the address, add the contents of R1 to the value, and store the result back to R1.
19.5.4 Immediate Operands
Some instructions support an immediate operand, which is simply a value included in the
instruction encoding. The immediate value may or may not be sign extended, depending on the
particular instruction. One instruction that supports an immediate operand is MOVI
. An example
usage of this instruction is:
MOVIww R1, 0x1234
This instruction moves the immediate value 0x1234 directly into VM register R1. The immediate
value is contained directly in the encoding for the MOVI instruction.