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IXF1104 4-Port Gigabit Ethernet Media Access Controller
163 Datasheet
Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
8.4.1 MAC Control Registers
Table 70 through Table 92 “Port Multicast Address ($ Port_Index +0x1A – +0x1B)” on page 173
provide details on the control and status registers associated with each MAC port. The register
address is ‘Port_index + 0x**’, where the port index is set at any value from 0x0 through 0x5. All
registers are 32-bit. The unused bits of the registers are read-only and are set permanently to zero.
Table 70. Station Address ($ Port_Index +0x00 – +0x01)
Name Description Address Type
1
Default
Station Address
Low
Source MAC address bit 31-0.
This address is inserted in the source address
field when transmitting pause frames, and is also
used to compare against unicast pause frames
at the receiving side.
Port_Index
+ 0x00
R/W 0x0000000
Station Address
High
Source MAC address bit 47-32.
This address is inserted in the source address
field when transmitting pause frames, and is also
used to compare against unicast pause frames
at the receiving side. Bits 15:0 of this register are
assigned to bits 47:32 of the station address.
Port_Index
+ 0x01
R/W 0x00000000
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
Table 71. Desired Duplex ($ Port_Index + 0x02)
Bit Name Description Type
1
Default
Register Description:
Chooses between half-duplex and full-duplex operation in RGMII
100 Mbps or 10 Mbps mode only.
This register must be set to the default value of 1 and must not be changed when operating in
RGMII 1000 Mbps, GMII, or fiber mode.
0x00000001
31:1 Reserved Reserved R 0x00000000
0 Duplex Select
0 = Half-duplex
1 = Full-duplex
NOTE: Half-duplex operation applies only to
10/100 Mbps speed on copper media in RGMII
mode only. Gigabit speed on either media requires
full-duplex.
R/W 1
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
Table 72. FD FC Type ($ Port_Index + 0x03)
Name Description Address Type
1
Default
FD FC Type
This value fills the Type field of the Transmitted
Pause frames. Only bits 15:0 of this register are
used.
Port_Index
+ 0x03
R/W 0x00008808
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write