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IXF1104 4-Port Gigabit Ethernet Media Access Controller
67 Datasheet
Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
packets. CRC is removed optionally from receive packets after validation, and is not forwarded to
SPI3. Packets with a bad CRC are marked, counted in the statistics block, and may be optionally
dropped. A bad packet may be signaled with RERR on the SPI3 interface if it is not dropped.
The IXF1104 MAC operates only in full-duplex mode at 1000 Mbps rates on both SerDes and
GMII interface connections. The IXF1104 MAC is capable of operation at 1000 Mbps, full-duplex
in RGMII mode, and at full-duplex and half-duplex operation for 10/100 Mbps links.
5.1.1 Features for Fiber and Copper Mode
Section 5.1.1.1 through Section 5.1.1.4 cover IXF1104 MAC functions that are independent of the
line-side interface.
5.1.1.1 Padding of Undersized Frames on Transmit
The padding feature allows Ethernet frames smaller than 64 bytes to be transferred from the SPI3
interface to the TX MAC and padded up to 64 bytes automatically by the MAC. This feature is
enabled by setting bit 7 of the “Diverse Config Write ($ Port_Index + 0x18)".
Note: When the user selects the padding function, the MAC core adds an automatically calculated CRC
to the end of the transmitted packet.
5.1.1.2 Automatic CRC Generation
Automatic CRC Generation is used in conjunction with the padding feature to generate and append
a correct CRC to any transmit frame. This feature is enabled by setting bit 6 of the “Diverse Config
Write ($ Port_Index + 0x18)".
5.1.1.3 Filtering of Receive Packets
This feature allows the IXF1104 MAC to filter receive packets under various conditions and drop
the packets through an interaction with the Receive FIFO control.
5.1.1.3.1 Filter on Unicast Packet Match
This feature is enabled when bit 0 of the “RX Packet Filter Control ($ Port_Index + 0x19)" = 1.
Any frame received in this mode that does not match the Station Address (MAC address) is marked
by the IXF1104 MAC to be dropped. The frame is dropped if the appropriate bit in the “RX FIFO
Errored Frame Drop Enable ($0x59F)" = 1. Otherwise, the frame is sent out the SPI3 interface and
may optionally be signaled with an RERR (see bit 0 in “SPI3 Receive Configuration ($0x701)” on
page 215).
When bit 0 of the “RX Packet Filter Control ($ Port_Index + 0x19)" = 0, all unicast frames are sent
out the SPI3 interface.
Note: The VLAN filter overrides the unicast filter. Therefore, a VLAN frame cannot be filtered based on
the unicast address.