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APPENDIX B REGISTER INDEX
User’s Manual U12978EJ3V0UD
230
Port mode register 2 (PM2).................................................................................................................................... 69
Port mode register 4 (PM4).................................................................................................................................... 69
Port output mode register 0 (POM0)...................................................................................................................... 71
Port output mode register 1 (POM1)...................................................................................................................... 71
Processor clock control register (PCC).................................................................................................................. 74
Pull-up resistor option register 0 (PU0).................................................................................................................. 70
[R]
Receive data address (USBR0 to USBR7).......................................................................................................... 103
Receive data PID (USBRD) ................................................................................................................................. 103
Receive token address (USBRAL, USBRAH)...................................................................................................... 102
Receive token PID (USBRTP).............................................................................................................................. 102
Remote wake-up control register (REMWUP)...................................................................................................... 121
[S]
Serial operation mode register 10 (CSIM10)........................................................................................................ 157
[T]
Timer clock select register 2 (TCL2)...................................................................................................................... 93
Token address compare register (ADRCMP)....................................................................................................... 107
Token packet receive result store register (TRXRSL).......................................................................................... 113
Token PID compare register (TIDCMP)............................................................................................................... 106
Transmit/receive shift register 10 (SIO10) ........................................................................................................... 155
Transmit data bank 0 address (USBT00 to USBT07).......................................................................................... 104
Transmit data bank 1 address (USBT10 to USBT17).......................................................................................... 104
Transmit data PID bank 0 (USBTD0)................................................................................................................... 104
Transmit data PID bank 1 (USBTD1)................................................................................................................... 104
Transmit/receive pointer (USBPOB, USBPOW) .................................................................................................. 101
[U]
USB receiver enable register (USBMOD)............................................................................................................ 109
USB timer start reservation control register (USBTCL)........................................................................................ 120
[W]
Watchdog timer mode register (WDTM)................................................................................................................. 94