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Management Complex: MPC8548 Processor
10009109-01 ATCA-9305 User’s Manual
4-5
Chip Selects
The MPC8548 memory controller functions as a chip select (CS) generator to access on-
board memory devices. In order to select one device over another, the following chip
selects have been established.
Table 4-3: Device Chip Selects
F800,0000 — reserved (64 MB)
F600,0000 R/W Soldered flash bank 4 (32 MB) 4-7
F400,0000 R/W Soldered flash bank 3 (32 MB) 4-7
F080,0000 — reserved (56 MB)
F3C0,0000 R/W Soldered flash bank 2 (4 MB) 4-7
F380,0000 R/W Soldered flash bank 1 (4 MB) 4-7
F000,0000 R/W PCI Express I/O space (16 MB) 4-8
E000,0000 R/W PCI Express (256 MB) 4-8
8000,0000 R/W PCI (1.5 GB) 4-8
0000,0000 R/W SDRAM DDR2 (2 GB) 4-7
Pin: Signal:
0Boot bank
1
1. Boot bank can be either socketed flash, flash 1, or flash 2;
depending on the jumper setting (see Fig. 2-6).
1 Soldered flash boot bank 1 (default)
2 Soldered flash boot bank 2
3Socketed flash (optional)
4KSL CPLD registers
5NAND flash
6 Soldered NOR flash boot banks 3 and 4
7LPC interface
Hex Physical
Address:
Access
Mode: Register Description: (continued)
See
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