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Management Processor CPLD: MPC8548 PLD Register
ATCA-9305 User’s Manual 10009109-01
5-2
Product ID
This read-only register identifies the board as ATCA-9305, and is used for PLD coding.
Register 5-1: Product ID (0x00)
Hardware Version
This read-only register tracks hardware revisions.
Register 5-2: Hardware Version (0x04)
0x84 CGDO Cavium GPIO Data Out 5-13
0x88 CGDI Cavium GPIO Data In 5-13
0x8C IGCR IPMP/IPMC GPIO Control 5-14
0xD0 LPC1 Low Pin Count (LPC) Bus Control 5-14
0xD4 LPCD LPC Data 5-15
0xD8 SIRQI1 Serial IRQ Interrupt 1 [15:8] 5-15
0xDC SIRQI2 Serial IRQ Interrupt 2 [7:0] 5-15
1. Scratch 1 (0x40) is a read/write register for storage only.
Bits: Function: Description:
7 CAVF1 Cavium Frequency 1
6 CAVF0 Cavium Frequency 0
50 Product ID
40
30
20
1 HC1 Hardware Configuration 1
0 HC0 Hardware Configuration 0
Bits: Function: Description:
70
60
50
40
3 HVN (3) Hardware Version Number is hard coded in the PLD and changes
with every major PCB artwork version.
Version starts at 00
16
.
2HVN (2)
1HVN (1)
0HVN (0)
Address
Offset (hex): Mnemonic: Register Name: (continued) See Page: