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Management Processor CPLD: MPC8548 PLD Register
ATCA-9305 User’s Manual 10009109-01
5-4
Register 5-5: Hardware Configuration 0 (0x10)
Jumper Settings
These read-only bits may be read by software to determine the current jumper settings. See
the jumper descriptions on page 2-8.
Register 5-6: Jumper Settings (0x18)
LED
Writing a one to an LED bit lights that LED. During monitor power-up, the debug LEDs are
used to display the software progress.
Bits: Function: Description:
70
6 P33P P33 (StrataFlash) is Present
5 RST_IND_CLR Clear the Reset Indication to the IPMC controller
4 CAVF1 Cavium Frequency 1
3 CAVF0 Cavium Frequency 0
2 PQCF1 MPC8548 Core Frequency 1
1 PQCF0 MPC8548 Core Frequency 0
0 PQDDRF MPC8548 DDR SDRAM Fast
Bits: Function: Description:
70
60
50
4 SJ Cavium Boot Flash Jumper
0 Installed, Cavium processors boot from soldered flash
1 Not installed, Cavium processors boot from socket
3BOOT Boot PCI Jumper
0 Installed, boot from flash (socket or soldered per bit 4)
1 Not installed, boot over PCI from the MPC8548
2 REDIR Boot Redirect Jumper
0 Installed, disables boot redirection
1 Not installed, enables boot redirection
1IG ROM Ignore SROM
0 Not installed, SROM is used for initialization (default)
1 Installed, disables SROM, uses default values in monitor
code
0 BT SKT Boot from Socket
0 Not installed, enables MPC8548 to boot from soldered
flash (default)
1 Installed, enables MPC8548 to boot from socketed flash