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Management Complex: PCI
ATCA-9305 User’s Manual 10009109-01
4-8
in a dual-bank architecture for concurrent read/write operation with hardware and software
data protection schemes. These devices start at physical addresses F000,0000
16
(boot bank
1) and F040,0000
16
(boot bank 2).
1 GB x 16
The ATCA-9305 uses 1 GB of M-Systems DiskOnChip (mDOC H3) NAND flash starting at
physical address FC00,0000
16
for non-volatile RAM storage and True Flash File System
(TFFS). This memory incorporates an embedded flash controller and memory, and includes
hardware protection and security-enabling features, an enhanced programmable boot
block enabling eXecution In Place (XIP) functionality using 16-bit access, user-controlled
One Time Programmable (OTP) partitions, and 6-bit Error Detection Code/Error Correction
Code (EDC/ECC).
64 MB x 16
The 64 MB soldered NOR flash starts at physical address F400,0000
16
(bank 3)
.
The 64-Mbit
P33 device provides CN5860 code storage and non-volatile memory.
PCI
The MPC8548 performs all the functions of a PCI host and monarch, and handles all arbitra-
tion and enumeration functions. PCI starts at physical address 8000,0000
16
.
The PCI bus connects to both Cavium processors, the MPC8548 processor and the Broad-
com Ethernet switch, see
Ta bl e 4 - 4. All of the devices on the PCI bus can operate at 66 MHz
and perform 64-bit transactions in conventional PCI mode except for the Broadcom switch.
The switch has a 32-bit PCI bus.
The MPC8548 stores the Cavium CN5860 operating system and monitor code in local
memory and then uses the boot over PCI functionality to bring up the CN5860 processor
complexes.
Table 4-4: PCI Device Interrupts and ID Assignments
PCI Express
The four lane PCIe routes between the MPC8548 and the optional rear transition module
(zone 3 connector). PCIe starts at physical address E000,0000
16
.
PCI Device: Interrupt: IDSEL:
Cavium processor 1 IRQ6 PCI_AD11
Cavium processor 2 IRQ5 PCI_AD12
Ethernet switch IRQ4 PCI_AD13
MPC8548 — PCI_AD14