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82854 Graphics Memory Controller Hub (GMCH)
110 D15343-003
4.11.21 PMCS – Power Management Control/Status Register (Device #2)
Address Offset:
Default Value:
Access:
Size:
D4-D5h
0000h
Read/Write, Read Only
16 bits
Bit Description
15 PME_Status –RO: This bit is 0 to indicate that IGD does not support PME# generation from D3
(cold).
14:9 Reserved
8 PME_En–RO: This bit is 0 to indicate that PME# assertion from D3 (cold) is disabled.
7:2 Reserved
1:0 PowerState–R/W: This field indicates the current power state of the IGD and can be used to set
the IGD into a new power state. If software attempts to Write an unsupported state to this field,
Write operation must complete normally on the bus, but the data is discarded and no state change
occurs.
On a transition from D3 to D0 the graphics controller is optionally Reset to initial values.
Bits[1:0] Power State
00 D0 Default
01 D1
10 D2 Not Supported
11 D3