Intel D15343-003 Switch User Manual


 
Intel
®
82854 Graphics Memory Controller Hub (GMCH)
24 D15343-003
2.6 Hub Interface
A proprietary interconnect connects the GMCH to the ICH4-M. All communication between the
GMCH and the ICH4-M occurs over the Hub interface 1.5. The Hub interface runs at 66 MHz
(266-MB/s).
2.7 Address Decode Policies
Host initiated I/O cycles are positively decoded to the GMCH configuration space and
subtractively decoded to the Hub interface. Host initiated system memory cycles are positively
decoded to DDR SDRAM and are again subtractively decoded to the Hub interface, if less than
4 GB. System memory accesses from the Hub interface to DDR SDRAM will be snooped on
the FSB.