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Register Description
D15343-003 89
Bit Description
31:28 DDR SDRAM Throttle Mode (TMODE):
Four bits control which mechanisms for Throttling are enabled in an “OR” fashion. Counter-
based Throttling is lower priority than Thermal Trips Throttling when both are enabled and
Tripped. Counter-based trips point Throttling values and Thermal-based Trip Point Throttling
values are specified in this register.
If the counter and thermal mechanisms for either Rank or GMCH are both enabled, Throttle
settings for the one that Trips first is used until the end of the second gdsw.
[Rank Counter, GMCH Write Counter, Rank Thermal Sensor, GMCH Thermal Sensor]
0000 = Throttling turned off. This is the default setting. All Counters are off.
0001 = Only GMCH Thermal Sensor based Throttling is enabled. If GMCH Thermal Sensor is
Tripped, Write Throttling begins based on the setting in WTTC.
0010 = Only Rank Thermal Sensor based Throttling is enabled. When the external SO-DIMM
Thermal sensor is Tripped, DDR SDRAM Throttling begins based on the setting in RTTC.
0011 = Both Rank and GMCH Thermal Sensor based throttling is enabled. When the external
SO-DIMM Thermal Sensor is Tripped DDR SDRAM Throttling begins based on the setting in
RTTC. If the GMCH Thermal Sensor is Tripped, Write Throttling begins based on the setting in
WTTC.
0100 = Only the GMCH Write Counter mechanism is enabled. When the length of write
transfers programmed (GDSW * WCTC) is reached, DRAM throttling begins based on the
setting in WCTC..
0101 = GMCH Thermal Sensor and GMCH Write DDR SDRAM Counter mechanisms are both
enabled. If the GMCH Write DDR SDRAM Counter mechanism threshold is reached, DDR
SDRAM Throttling begins based on the setting in WCTC. If the GMCH Thermal Sensor is
tripped, DDR SDRAM Throttling begins based on the setting in WTTC. If both threshold
mechanisms are tripped, the DDR SDRAM Throttling begins based on the settings in WTTC.
0110 = Rank Thermal Sensor and GMCH Write DDR SDRAM Counter mechanisms are both
enabled. If the GMCH Write DDR SDRAM Counter mechanism threshold is reached, DDR
SDRAM Throttling begins based on setting in WCTC. If the external SO-DIMM Thermal Sensor
is tripped, Rank DDR SDRAM throttling begins based on the setting in RTTC.
0111 = Similar to 0101 for Writes and when the Rank Thermal Sensor is tripped, DDR SDRAM
Throttling begins based on the setting in RTTC.
1000 = Only Rank Counter mechanism is enabled. When the length of read transfers
programmed (GDSW * RCTC) is reached, DRAM throttling begins based on the setting in
RCTC
1001 = Rank Counter mechanism is enabled and GMCH Thermal Sensor based throttling are
both enabled. If GMCH thermal sensor is tripped, write throttling begins based on the setting in
WTTC. If the rank counter mechanism is tripped, DRAM throttling begins based on the setting
in RCTC.
1010 = Rank Thermal Sensor and Rank DDR SDRAM Counter mechanisms are both enabled.
If the rank DDR SDRAM Counter mechanism threshold is reached, DDR SDRAM Throttling
begins based on the setting in RCTC. If the external SO-DIMM Thermal Sensor is tripped,
DRAM Throttling begins based on the setting in RTTC.
1011 = Similar to 1010 and if the GMCH Thermal Sensor is tripped, Write Throttling begins
based on the setting in WTTC.
1111 = Rank and GMCH Thermal Sensor based Throttling and Rank and GMCH Write Counter
based Throttling are enabled. If both the Write Counter and GMCH Thermal Sensor based
mechanisms are tripped, DDR SDRAM Throttling begins based on the setting allowed in WTTC.
If both the Rank Counter and Rank Thermal Sensor based mechanisms are tripped, DDR
SDRAM Throttling begins based on the setting allowed in RTTC.