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Epson S5U1C63000A Computer Accessories User Manual

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Instruction List (11)

S1C63000 Core CPU

Opcode

CLR

SET

TST

SLL

SRL

RL

RR

LDB

Operand

[00addr6],imm2

[FFaddr6],imm2

[00addr6],imm2

[FFaddr6],imm2

[00addr6],imm2

[FFaddr6],imm2

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

%A

%B

[%X]

[%X]+

[%Y]

[%Y]+

%BA,%XL

%BA,%XH

%BA,%YL

%BA,%YH

%BA,%EXT

%BA,%SP1

%BA,%SP2

Basic function

[00addr6] ← [00addr6]∧not (2

imm2

)

[FFaddr6] ← [FFaddr6]∧not (2

imm2

)

[00addr6] ← [00addr6]∨(2

imm2

)

[FFaddr6] ← [FFaddr6]∨(2

imm2

)

[00addr6]∧(2

imm2

)

[FFaddr6]∧(2

imm2

)

A (C←D3←D2←D1←D0←0)

B (C←D3←D2←D1←D0←0)

[X] (C←D3←D2←D1←D0←0)

[X] (C←D3←D2←D1←D0←0), X ← X+1

[Y] (C←D3←D2←D1←D0←0)

[Y] (C←D3←D2←D1←D0←0), Y ← Y+1

A (0→D3→D2→D1→D0→C)

B (0→D3→D2→D1→D0→C)

[X] (0→D3→D2→D1→D0→C)

[X] (0→D3→D2→D1→D0→C), X ← X+1

[Y] (0→D3→D2→D1→D0→C)

[Y] (0→D3→D2→D1→D0→C), Y ← Y+1

A (C←D3←D2←D1←D0←C)

B (C←D3←D2←D1←D0←C)

[X] (C←D3←D2←D1←D0←C)

[X] (C←D3←D2←D1←D0←C), X ← X+1

[Y] (C←D3←D2←D1←D0←C)

[Y] (C←D3←D2←D1←D0←C), Y ← Y+1

A (C→D3→D2→D1→D0→C)

B (C→D3→D2→D1→D0→C)

[X] (C→D3→D2→D1→D0→C)

[X] (C→D3→D2→D1→D0→C), X ← X+1

[Y] (C→D3→D2→D1→D0→C)

[Y] (C→D3→D2→D1→D0→C), Y ← Y+1

BA ← XL

BA ← XH

BA ← YL

BA ← YH

BA ← EXT

BA ← SP1

BA ← SP2

Extended function

(when "LDB %EXT, imm8" is executed)

–

–

–

–

–

–

–

–

[00imm8] (C←D3←D2←D1←D0←0)

–

[FFimm8] (C←D3←D2←D1←D0←0)

–

–

–

[00imm8] (0→D3→D2→D1→D0→C)

–

[FFimm8] (0→D3→D2→D1→D0→C)

–

–

–

[00imm8] (C←D3←D2←D1←D0←C)

–

[FFimm8] (C←D3←D2←D1←D0←C)

–

–

–

[00imm8] (C→D3→D2→D1→D0→C)

–

[FFimm8] (C→D3→D2→D1→D0→C)

–

–

–

–

–

–

–

–

Symbol

●

●

●

●

●

●

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

Clk

2

2

2

2

1

1

1

1

2

2

2

2

1

1

2

2

2

2

1

1

2

2

2

2

1

1

2

2

2

2

1

1

1

1

1

1

1

C

–

–

–

–

–

–

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

–

–

–

–

–

–

–

Z

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

↔

–

–

–

–

–

–

–

E

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

I

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

Mnemonic

Classification

Logic

operation

Shift and

rotate

8/16-bit

transfer and

operation

Flags

Remarks

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