Renesas R61509V Computer Monitor User Manual


 
R61509V Target Spec
Rev. 0.11 April 25, 2008, page 63 of 181
Panel Interface Control 8 (R022h)
VEQWE[2:0]: Sets low power VCOM drive period. The setting is enabled when RGB interface is
selected.
Table 35
VEQWE[2:0] Source output delay period VEQWE[2:0] Source output delay period
3’h0 0 clocks (
*see Notes
) 3’h4 4 clocks
3’h1 1 clock 3’h5 5 clocks
3’h2 2 clocks 3’h6 6 clocks
3’h3 3 clocks 3’h7 7 clocks
Notes: 1. 1 clock
= (Number
of data transfer/pixel) x
DIVE
(division ratio) x
(PCDIVL + PCDIVH)) [DOTCLK]
2. The number of clocks is measured from the reference point. The reference point is the
alternating position of VCOM, which is set by SDTE bits.
㪭㪚㪦㪤㩷㫆㫌㫋㫇㫌㫋
㪭㪜㪨㪮㪠㪲㪉㪑㪇㪴
㪞㪥㪛㩷㫃㪼㫍㪼㫃㩷
㪭㪜㪨㪮㪠㪲㪉㪑㪇㪴
㪭㪚㪠㩷㫃㪼㫍㪼㫃㩷
1) VEQW [2:0]=0h
㪭㪚㪦㪤㩷㫆㫌㫋㫇㫌㫋
2) VEQWI [2:0] ≠0h
Figure 7
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
R/W 1 0 0 0 0 0
VEQ
WE
[2]
VEQ
WE
[1]
VEQ
WE
[0]
0 0 0 0 0
SEQ
WE
[2]
SEQ
WE
[1]
SEQ
WE
[0]
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0