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R61509V Target Spec
Rev. 0.11 April 25, 2008, page 88 of 181
Partial Display Control
Partial Image 1: Display Position (R500h), RAM Address 1 (Start Line Address) (R501h), RAM
Address 1 (End Line Address) (R502h)
PTDP[8:0]: Sets the display position of partial image 1.
If PTDP0 = “9’h000”, the partial image 1 is displayed from the first line of the base image.
PTSA[8:0] and PTEA[8:0]: Sets the start line and end line addresses of the RAM area, respectively for the
partial image 1. In setting, make sure that PTSA
≤
PTEA.
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
R
500h
R/W 1 0 0 0 0 0 0 0
PTD
P [8]
PTD
P [7]
PTD
P [6]
PTD
P [5]
PTD
P [4]
PTD
P [3]
PTD
P [2]
PTD
P [1]
PTD
P [0]
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R
501h
R/W 1 0 0 0 0 0 0 0
PTS
A [8]
PTS
A [7]
PTS
A [6]
PTS
A [5]
PTS
A [4]
PTS
A [3]
PTS
A [2]
PTS
A [1]
PTS
A [0]
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R
502h
R/W 1 0 0 0 0 0 0 0
PTE
A
[8]
PTE
A
0[7]
PTE
A [6]
PTE
A [5]
PTE
A [4]
PTE
A [3]
PTE
A [2]
PTE
A [1]
PTE
A [0]
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0