www.ti.com
2.4.3BandwidthManager
InternalPeripherals
Thebandwidthmanagerprovidesaprogrammableinterfaceforoptimizingbandwidthamongthe
requestersforresources,whichincludethefollowing:
•EDMA-initiatedDMAtransfers(andresultingcoherencyoperations)
•IDMA-initiatedtransfers(andresultingcoherencyoperations)
•Programmablecachecoherencyoperations
–Blockbasedcoherencyoperations
–Globalcoherencyoperations
•CPUdirect-initiatedtransfers
–Dataaccess(load/store)
–Programaccess
Theresourcesincludethefollowing:
•L1Pmemory
•L1Dmemory
•L2memory
•ResourcesoutsideofC64x+Megamodule:externalmemory,on-chipperipherals,registers
Sinceanygivenrequestorcouldpotentiallyblockaresourceforextendedperiodsoftime,thebandwidth
managerisimplementedtoassurefairnessforallrequesters.
Thebandwidthmanagerimplementsaweighted-priority-drivenbandwidthallocation.Eachrequestor
(EDMA,IDMA,CPU,etc.)isassignedaprioritylevelonaper-transferbasis.Theprogrammablepriority
levelhasasinglemeaningthroughoutthesystem.Thereareatotalofnineprioritylevels,wherepriority
zeroisthehighestpriorityandpriorityeightisthelowestpriority.Whenrequestsforasingleresource
contend,accessisgrantedtothehighest-priorityrequestor.Whenthecontentionoccursformultiple
successivecycles,acontentioncounterassuresthatthelower-priorityrequestorgetsaccesstothe
resourceevery1outofnarbitrationcycles,wherenisprogrammable.Aprioritylevelof-1representsa
transferwhosepriorityhasbeenincreasedduetoexpirationofthecontentioncounteroratransferthatis
fixedasthehighest-prioritytransfertoagivenresource.
SPRU978E–March2008TMS320C64x+Megamodule23
SubmitDocumentationFeedback