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5.2.2.1InitializationtoPLLModefromPLLPowerDown
PLL1Control
IfthePLLispowereddown(PLLPWRDNbitinPLLCTLissetto1),youmustfollowtheprocedurebelow
tochangePLL1frequencies.Therecommendationistostopallperipheraloperationbeforechangingthe
PLL1frequency,withtheexceptionoftheC64x+DSPandDDR2.TheC64x+DSPmustbeoperationalto
programthePLLcontroller.DDR2operatesoffoftheclockfromPLLC2.
1.SelecttheclockmodebyprogrammingtheCLKMODEbitinPLLCTL.
2.BeforechangingthePLLfrequency,switchtoPLLbypassmode:
a.ClearthePLLENSRCbitinPLLCTLto0toallowPLLCTL.PLLENtotakeeffect.
b.ClearthePLLENbitinPLLCTLto0(selectPLLbypassmode).
c.Waitfor4MXIcyclestoensurePLLCswitchestobypassmodeproperly.
3.ClearthePLLRSTbitinPLLCTLto0(resetPLL)
4.SetthePLLDISbitinPLLCTLto1(disablePLLoutput).
5.ClearthePLLPWRDNbitinPLLCTLto0tobringthePLLoutofpower-downmode.
6.ClearthePLLDISbitinPLLCTLto0(enablethePLL)toallowPLLoutputstostarttoggling.Notethat
thePLLCisstillatPLLbypassmode;therefore,thetogglingPLLoutputdoesnotgetpropagatedto
therestofthedevice.
7.WaitforPLLstabilizationtime.Seethedevice-specificdatamanualforPLLstabilizationtime.
8.ProgramtherequiredmultipliervalueinPLLM.
9.Ifnecessary,programPLLDIV1,PLLDIV2,andPLLDIV3registerstochangetheSYSCLK1,SYSCLK2,
andSYSCLK3dividevalues:
a.CheckfortheGOSTATbitinPLLSTATtoclearto0toindicatethatnoGOoperationiscurrentlyin
progress.
b.ProgramtheRATIOfieldinPLLDIV1,PLLDIV2,andPLLDIV3withthedesireddividefactors.Note
thatthedividersmustmaintaina1:3:6ratiotosatisfytheCLKDIV1,CLKDIV3,CLKDIV6clock
domainrequirements.Seethedevice-specificdatamanualformoredetailsonClockDomains.In
addition,makesureinthisstepyouleavethePLLDIV1.D1EN,PLLDIV2.D2EN,and
PLLDIV3.D3ENbitsset(default).
c.SettheGOSETbitinPLLCMDto1toinitiateanewdividertransition.Duringthistransition,
SYSCLK1,SYSCLK2,andSYSCLK3arepausedmomentarily.
d.WaitforNnumberofPLLDIVnsourceclockcyclestoensuredividerchangeshavecompleted.See
Section5.2.2.3fortheformulaoncalculatingthenumberofcyclesN.
e.WaitfortheGOSTATbitinPLLSTATtoclearto0.
10.WaitforPLLtoresetproperly.Seethedevice-specificdatamanualforPLLresettime.
11.SetthePLLRSTbitinPLLCTLto1tobringthePLLoutofreset.
12.WaitforPLLtolock.Seethedevice-specificdatamanualforPLLlocktime.
13.SetthePLLENbitinPLLCTLto1toremovethePLLfrombypassmode.
PLLController 40SPRU978E–March2008
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