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3.2MemoryInterfacesOverview
3.2.1DDR2ExternalMemoryInterface
3.2.2ExternalMemoryInterface
3.2.2.1AsynchronousEMIFInterface
3.2.2.2NANDInterface
MemoryInterfacesOverview
ThissectiondescribesthedifferentmemoryinterfacesofDM643xDMP.TheDM643xDMPsupports
severalmemoryandexternaldeviceinterfaces,includingthefollowing:
•DDR2synchronousDRAM
•AsynchronousEMIF/NOR/NANDFlash
TheDDR2externalmemoryinterface(EMIF)portisadedicatedinterfacetoDDR2SDRAM.Itsupports
JESD79D-2AstandardcompliantDDR2SDRAMdevicesandcansupporteither16-bitor32-bitinterfaces.
DDR2SDRAMplaysakeyroleinaDM643xDMP-basedsystem.Suchasystemisexpectedtorequirea
significantamountofhigh-speedexternalmemoryforthefollowing:
•Bufferinginputimagedatafromsensorsorvideosources
•Intermediatebufferingforprocessing/resizingofimagedatainthevideoprocessingfrontend(VPFE)
•Videoprocessingbackend(VPBE)displaybuffers
•IntermediatebufferingforlargerawBayerdataimagefileswhileperformingstillcameraprocessing
functions
•Bufferingforintermediatedatawhileperformingvideoencodeanddecodefunctions
•StorageofexecutablefirmwareforDSP
TheDM643xDMPexternalmemoryinterface(EMIF)providesan8-bitdatabus,anaddressbuswidthof
upto24-bits,and4dedicatedchipselects,alongwithmemorycontrolsignals.Thesesignalsarestatically
multiplexedbetweentheasynchronousEMIF(EMIFA)modulethatprovidesasynchronousEMIFand
NANDinterfaces.
TheEMIFAsignalsaremultiplexedwithotherperipheralsignalsonthedevice.Refertodevice-specific
datamanualfordetailsonpinmultiplexing.
TheasynchronousEMIF(EMIFA)interfaceprovidesboththeasynchronousEMIFandNANDinterfaces.
Fourchipselectsareprovided.EachisindividuallyconfigurabletoprovideeitherasynchronousEMIFor
NANDsupport.
•TheasynchronousEMIFmodesupportsasynchronousdevices(RAM,ROM,andNORFlash)
•64MBasynchronousaddressrangeover4chipselects(16MBeach)
•Supports8-bitdatabuswidth
•Programmableasynchronouscycletimings
•Supportsextendedwaits
•SupportsSelectStrobemode
•SupportsTIDSPHPIinterface
•SupportsbootingDM643xDMPfromCS2(SRAM/NORFlash)
TheasynchronousEMIF(EMIFA)interfaceprovidesboththeasynchronousEMIFandNANDinterfaces.
FourchipselectsareprovidedandeachisindividuallyconfigurabletoprovideeitherEMIFAorNAND
support.
•TheNANDmodesupportsNANDFlashonupto4asynchronouschipselects
•Supports8-bitdatabuswidth
•Programmablecycletimings
•PerformsECCcalculation
•BootloadercodeinBootROMsupportsbootingoftheDM643xDMPfromNAND-FlashlocatedatCS2
SPRU978E–March2008SystemMemory27
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