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6.7.3ModuleErrorPendingRegister1(MERRPR1)
6.7.4ModuleErrorClearRegister1(MERRCR1)
PSCRegisters
Themoduleerrorpendingregister1(MERRPR1)isshowninFigure6-4anddescribedinTable6-8.Only
theC64x+CPU(module39)canhaveanerrorcondition,asitistheonlymodulewithIcePicksupport.
SeeSection6.5formoreinformation.
Figure6-4.ModuleErrorPendingRegister1(MERRPR1)
3116
Reserved
R-0
158760
ReservedM[39]Reserved
R-0R-0R-0
LEGEND:R=Readonly;-n=valueafterreset
Table6-8.ModuleErrorPendingRegister1(MERRPR1)FieldDescriptions
BitFieldValueDescription
31-8Reserved0Reserved
7M[39]Moduleinterruptstatusbitformodule39(C64x+CPU).
0Module39doesnothaveanerrorcondition.
1Module39hasanerrorcondition.Seethemodulestatus39register(MDSTAT39)fortheexacterror
condition.
6-0Reserved0Reserved
Themoduleerrorclearregister1(MERRCR1)isshowninFigure6-5anddescribedinTable6-9.Onlythe
C64x+CPU(module39)canhaveanerrorcondition,asitistheonlymodulewithIcePicksupport.
Figure6-5.ModuleErrorClearRegister1(MERRCR1)
3116
Reserved
R-0
158760
ReservedM[39]Reserved
R-0W-0R-0
LEGEND:R=Readonly;W=Writeonly;-n=valueafterreset
Table6-9.ModuleErrorClearRegister1(MERRCR1)FieldDescriptions
BitFieldValueDescription
31-8Reserved0Reserved
7M[39]Clearstheinterruptstatusbitssetinthecorrespondingmoduleerrorpendingregister1(MERRPR1)
andthemodulestatus39register(MDSTAT39).Thispertainstomodule39.
0Awriteof0hasnoeffect.
1Clearsmoduleinterruptstatusbits:theM[39]bitinMERRPR1,theEMURSTbitandtheEMUIHBbitin
MDSTAT39.
6-0Reserved0Reserved
PowerandSleepController 70SPRU978E–March2008
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