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4-1SystemClockModesandFixedRatiosforCoreClockDomains....................................................30
4-2ExamplePLL1FrequenciesandDividers(27MHZClockInput)....................................................32
4-3ExamplePLL2Frequencies(CoreVoltage=1.2V)...................................................................33
4-4ExamplePLL2Frequencies(CoreVoltage=1.05V)..................................................................33
4-5PeripheralI/ODomainClock.............................................................................................34
4-6PossibleClockingModes..................................................................................................36
5-1SystemPLLC1OutputClocks............................................................................................39
5-2DDRPLLC2OutputClocks...............................................................................................43
5-3PLLandResetControllerList............................................................................................48
5-4PLLandResetControllerRegisters.....................................................................................48
5-5PeripheralIDRegister(PID)FieldDescriptions........................................................................49
5-6ResetTypeStatusRegister(RSTYPE)FieldDescriptions...........................................................49
5-7PLLControlRegister(PLLCTL)FieldDescriptions....................................................................50
5-8PLLMultiplierControlRegister(PLLM)FieldDescriptions...........................................................51
5-9PLLControllerDivider1Register(PLLDIV1)FieldDescriptions....................................................51
5-10PLLControllerDivider2Register(PLLDIV2)FieldDescriptions....................................................52
5-11PLLControllerDivider3Register(PLLDIV3)FieldDescriptions....................................................52
5-12OscillatorDivider1Register(OSCDIV1)FieldDescriptions.........................................................53
5-13BypassDividerRegister(BPDIV)FieldDescriptions..................................................................54
5-14PLLControllerCommandRegister(PLLCMD)FieldDescriptions...................................................55
5-15PLLControllerStatusRegister(PLLSTAT)FieldDescriptions.......................................................55
5-16PLLControllerClockAlignControlRegister(ALNCTL)FieldDescriptions........................................56
5-17PLLDIVRatioChangeStatusRegister(DCHANGE)FieldDescriptions...........................................57
5-18ClockEnableControlRegister(CKEN)FieldDescriptions...........................................................58
5-19ClockStatusRegister(CKSTAT)FieldDescriptions..................................................................59
5-20SYSCLKStatusRegister(SYSTAT)FieldDescriptions..............................................................60
6-1DM643xDMPDefaultModuleConfiguration...........................................................................63
6-2ModuleStates..............................................................................................................64
6-3IcePickEmulationCommands............................................................................................66
6-4PSCInterruptEvents......................................................................................................66
6-5PowerandSleepController(PSC)Registers..........................................................................68
6-6PeripheralRevisionandClassInformationRegister(PID)FieldDescriptions.....................................69
6-7InterruptEvaluationRegister(INTEVAL)FieldDescriptions.........................................................69
6-8ModuleErrorPendingRegister1(MERRPR1)FieldDescriptions..................................................70
6-9ModuleErrorClearRegister1(MERRCR1)FieldDescriptions.....................................................70
6-10PowerDomainTransitionCommandRegister(PTCMD)FieldDescriptions.......................................71
6-11PowerDomainTransitionStatusRegister(PTSTAT)FieldDescriptions...........................................71
6-12PowerDomainStatus0Register(PDSTAT0)FieldDescriptions...................................................72
6-13PowerDomainControl0Register(PDCTL0)FieldDescriptions....................................................73
6-14ModuleStatusnRegister(MDSTATn)FieldDescriptions............................................................74
6-15ModuleControlnRegister(MDCTLn)FieldDescriptions.............................................................75
7-1PowerManagementFeatures............................................................................................78
9-1TMS320DM643xDMPMasterIDs.......................................................................................88
9-2TMS320DM643xDMPDefaultMasterPriorities.......................................................................89
10-1ResetTypes.................................................................................................................92
A-1DocumentRevisionHistory...............................................................................................97
SPRU978E–March2008ListofTables7
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