Filter
Top Products
www.ti.com
5.3.2.4ChangingSYSCLKDividers
PLL2Control
ThissectiondiscussesthesoftwaresequencetochangetheSYSCLKdividers.TheSYSCLKdivider
changesequenceisalsoreferredtoasGOoperation,asitinvolveshittingtheGObit(GOSETbitin
PLLCMD)toinitiatethedividerchange.
1.CheckfortheGOSTATbitinPLLSTATtoclearto0toindicatethatnoGOoperationiscurrentlyin
progress.
2.ProgramtheRATIOfieldinPLLDIV1andPLLDIV2withthedesireddividefactors.ForPLLC2,thereis
nospecificfrequencyratiorequirementsbetweenSYSCLK1andSYSCLK2.Makesureinthisstepyou
leavethePLLDIV1.D1ENandPLLDIV2.D2ENbitsset(default).
3.SettheGOSETbitinPLLCMDto1toinitiateanewdividertransition.Duringthistransition,SYSCLK1
andSYSCLK2arepausedmomentarily.
4.WaitforNnumberofPLLDIVnsourceclockcyclestoensuredividerchangeshavecompleted.Seethe
followingformulaforcalculatingthenumberofcyclesN.
5.WaitfortheGOSTATbitinPLLSTATtoclearto0.
ThefollowingformulashouldbeusedtocalculatethenumberofPLLDIVnsourceclockcycles:
N=(2×LeastCommonMultiple[LCM]ofalltheoldSYSCLKdividevalues)+50cyclesoverhead
Example5-2.CalculatingNumberofClockCyclesN
ThisexamplecalculatesthenumberofclockcyclesN.
•Settingsbeforedividerchange:
–PLLDIV1.RATIO=1(divide-by-2)
–PLLDIV2.RATIO=9(divide-by-10)
•Newdividersettings:
–PLLDIV1.RATIO=1(divide-by-2)
–PLLDIV2.RATIO=19(divide-by-20)
Theleastcommonmultiplebetweentheolddividervaluesof/2and/10is/10;therefore,thenumberof
cyclesNis:
N=(2×10)+50cyclesoverhead=70PLLDIVnsourceclockcycles
IfPLLC2isinPLLmode(PLLCTL.PLLEN=1),thePLLDIVnsourceclockisthePLL2outputclock.If
PLLC2isinPLLbypassmode(PLLCTL.PLLEN=0),thePLLDIVnsourceclockisthedeviceclock
sourceMXI/CLKIN.
SPRU978E–March2008PLLController47
SubmitDocumentationFeedback