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5.4.9BypassDividerRegister(BPDIV)
PLLControllerRegisters
Thebypassdividerregister(BPDIV)isshowninFigure5-11anddescribedinTable5-13.Bypassdivider
controlsdividerforSYSCLKBP,dividingdownfromtheMXI/CLKINclock.
Figure5-11.BypassDividerRegister(BPDIV)
3116
Reserved
R-0
1514540
BPDENReservedRATIO
R/W-1R-0R/W-0or1
(1)
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
(1)
ForPLLC1,RATIOdefaultsto0(MXI/CLKINdivideby1);forPLLC2,RATIOdefaultsto1(MXI/CLKINdivideby2).
Table5-13.BypassDividerRegister(BPDIV)FieldDescriptions
BitFieldValueDescription
31-16Reserved0Reserved
15BPDENBypassdividerenable.
0Bypassdividerisdisabled.
1Bypassdividerisenabled.
14-5Reserved0Reserved
4-0RATIO0-1FhDividerratio.Dividervalue=RATIO+1.Forexample,RATIO=0meansdivideby1.
54PLLControllerSPRU978E–March2008
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