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5.3.2StepsforChangingPLL2Frequency
5.3.2.1DDR2ConsiderationsWhenModifyingPLL2Frequency
5.3.2.1.1PLL2FrequencyChangeStepsWhenDDR2MemoryControllerisInReset
5.3.2.1.2PLL2FrequencyChangeStepsWhenDDR2MemoryControllerisOutofReset
PLL2Control
ThePLLC2isprogrammedsimilarlytothePLLC1.Refertotheappropriatesubsectiononhowtoprogram
thePLL2clocks:
•IfthePLLispowereddown(PLLPWRDNbitinPLLCTLissetto1),followthefullPLLinitialization
procedureinSection5.3.2.2toinitializethePLL.
•IfthePLLisnotpowereddown(PLLPWRDNbitinPLLCTLisclearedto0),followthesequencein
Section5.3.2.3tochangethePLLmultiplier.
•IfthePLLisalreadyrunningatadesiredmultiplierandyouonlywanttochangetheSYSCLKdividers,
followthesequenceinSection5.3.2.4.
NotethatthePLLispowereddownafterthefollowingdevice-levelglobalresets:
•Power-onReset(POR)
•WarmReset(RESET)
•MaxReset
Inaddition,notethatthePLL2frequencydirectlyaffectstheDDR2memorycontrollerandtheVPSS
VPBEclocksource(ifPLLC2SYSCLK2isselectedastheVPBEclocksource).TheDDR2memory
controllerrequiresspecialsequencestobefollowedbeforeandafteryouchangethePLL2frequency.You
mustfollowtheadditionalconsiderationsfortheDDR2memorycontrollerinSection5.3.2.1inordertonot
corruptDDR2operation.
BeforechangingPLL2and/orPLLC2frequency,youmusttakeintoaccounttheDDR2memorycontroller
requirements.IftheDDR2memorycontrollerisusedinthesystem,followtheadditionalstepsinthis
sectiontochangePLL2and/orPLLC2frequencywithoutcorruptingDDR2operation.
•IftheDDR2memorycontrollerisinresetwhenyoudesiretochangethePLL2frequency,followthe
stepsinSection5.3.2.1.1.
•IftheDDR2memorycontrollerisalreadyoutofresetwhenyoudesiretochangethePLL2frequency,
followthestepsinSection5.3.2.1.2.
ThissectiondiscussesthestepstochangethePLL2frequencywhentheDDR2memorycontrollerisin
reset.NotethattheDDR2memorycontrollerisinresetafterthesedevice-levelglobalresets:power-on
reset,warmreset,maxreset.
1.LeavetheDDR2memorycontrollerinreset.
2.ProgramthePLL2clocksbyfollowingthestepsintheappropriatesection:Section5.3.2.2,
Section5.3.2.3,orSection5.3.2.4.(DiscussioninSection5.3.2explainswhichistheappropriate
subsection).
3.InitializetheDDR2memorycontroller.ThestepsforDDR2memorycontrollerinitializationarefoundin
theTMS320DM643xDMPDDR2MemoryControllerUser'sGuide(SPRU986).
ThissectiondiscussesthestepstochangethePLL2frequencywhentheDDR2memorycontrolleris
alreadyoutofreset.
1.StopDDR2memorycontrolleraccessesandpurgeanyoutstandingrequests.
2.PuttheDDR2memoryinself-refreshmodeandstoptheDDR2memorycontrollerclock.TheDDR2
memorycontrollerclockshutdownsequenceisintheTMS320DM643xDMPDDR2MemoryController
User'sGuide(SPRU986).
3.ProgramthePLL2clocksbyfollowingthestepsintheappropriatesection:Section5.3.2.2,
Section5.3.2.3,orSection5.3.2.4.(DiscussioninSection5.3.2explainswhichistheappropriate
subsection).
4.Re-enabletheDDR2memorycontrollerclock.TheDDR2memorycontrollerclockonsequenceisin
theTMS320DM643xDMPDDR2MemoryControllerUser'sGuide(SPRU986).
PLLController 44SPRU978E–March2008
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