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Hardware Specifications
Doc. No. MV-S104859-U0 Rev. E Copyright © 2008 Marvell
Page 32 Document Classification: Proprietary Information December 2, 2008, Preliminary
1.2.7 Serial Management Interface (SMI) Interface Pin
Assignments
Table 9: Serial Management Interface (SMI) Pin Assignments
Pin Name I/O Pin
Type
Power
Rail
Description
GE_MDC t/s
O
CMOS/ VDD_GE_A Management Data Clock
MDC is derived from TCLK divided by 128.
Provides the timing reference for the transfer of the MDIO signal.
GE_MDIO t/s
I/O
CMOS VDD_GE_A Management Data In/Out
Used to transfer control and status information between PHY
devices and the GbE controller.
NOTE: An external pullup is required.