National Instruments PC-LPM-16/PnP Switch User Manual


 
Appendix D Register-Level Programming
PC-LPM-16/PnP User Manual D-34
National Instruments Corporation
service the data acquisition, perform the following sequence
until you have read the desired number of conversion results:
1. Read the Status Register
2. If the DAVAIL bit is set, read the A/D FIFO Low-Byte
Register first, then read the A/D FIFO High-Byte Register,
to get the result.
Interrupts can also be used to service the data acquisition operation.
This topic is discussed under A/D Interrupt Programming later in this
appendix.
An overflow error condition may occur during a data acquisition
operation. This error condition is reported through the Status Register
and the OVERFLOW bit should be checked every time the Status
Register is read to check the DAVAIL bit.
An overflow condition occurs if more than 256 A/D conversions have
been stored in the A/D FIFO since the A/D FIFO was last read; that is,
the A/D FIFO is full and cannot accept any more data. This condition
occurs if the software loop reading the A/D FIFO Register is not fast
enough to keep up with the A/D conversion rate. When an overflow
occurs, you lose at least one A/D conversion result. An overflow
condition has occurred if you clear the OVERFLOW bit in the Status
Register.
Reset the OVERFLOW bit in the Status Register by writing to the A/D
Clear Register.
Programming Multiple A/D Conversions with Channel Scanning
The data acquisition programming sequences given earlier in this
appendix are for programming the PC-LPM-16PnP for multiple A/D
conversions on a single input channel. You can also program the
PC-LPM-16/PnP for scanning analog input channels during the data
acquisition operation. Analog channels N through 0 can be scanned,
where N can be 1 through 15. Also, 0 through N can be scanned.
Programming scanned multiple A/D conversions involves the same
sequence of steps as single-channel data acquisition operations except
that the SCANEN* bit is cleared in Command Register 1. When the
SCANEN* bit is cleared in Command Register 1, the analog channel-
select bits MA<3..0> select the highest numbered channel in the scan
sequence. For example, if MA<3..0> is 0011 (binary)—that is,
channel 3 is selected and the SCANEN* bit is cleared, and the
a.Book : l.Appendix D Page 34 Wednesday, November 20, 1996 6:36 PM