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PC-LPM-16/PnP User Manual I -2
©
National Instruments Corporation
B
base I/O address selection
PC-LPM-16, C-5 to C-9
example switch settings (figure), C-7
PC bus interface factory
settings (table), C-6
switch settings with corresponding
base I/O address (table), C-8 to C-9
PC-LPM-16PnP, 2-3
BCD bits, D-23
bipolar input selection 1 (
±
5 V) C-10 to C-11
bipolar input selection 2 (
±
2.5 V) C-11
bits
ARNG<1..0>, D-9
BCD, D-23
CALEN, D-8, D-28
CNTINT, D-11
CNTINTEN, D-5
CONVPROG, D-10
D<7..0>
Counter 0 Data Register, D-19
Counter 1 Data Register, D-20
Counter 2 Data Register, D-20
Digital Input Register, D-25
Digital Output Register, D-24
D<15..8>, D-16
DATAERR/OVERFLOW, D-11
DAVAIL, D-12, D-28, D-35
DISABDAQ, D-7, D-33
EXTINT*, D-11
EXTINTEN, D-5
FIFOINTEN, D-5, D-35
M<2..0>, D-23
MA<3..0>, D-5 to D-6, D-34
OVERFLOW, D-13, D-28, D-32, D-34
OVERRUN, D-13
REVID, D-10
RL<1..0>, D-22
SC<1..0>, D-21
SCANEN*, D-4, D-33, D-34 to D-35
SCANORDER, D-7
block diagram of PC-LPM-16PnP, 3-2
board configuration.
See
configuration.
bulletin board support, E-1
bus interface specifications, A-4
C
cables, custom, 1-5 to 1-6
CALEN bit, D-8, D-28
calibration
autocalibration, 3-5 to 3-6
programming A/D calibration, D-27
CLK signal
counter block diagram, 3-10
general purpose timing and
counter timing, 4-9 to 4-12
timing requirements for GATE and CLK
input signals, 4-11 to 4-12
CLK1 signal (table), 4-4
CLK2 signal (table), 4-4
CNTINT bit, D-11
CNTINTEN bit, D-5
Command Register 1, D-4 to D-6
Command Register 2, D-7 to D-8
Command Register 3, D-9
configuration
PC-LPM-16, C-4 to C-12
analog input jumper settings,
C-10 to C-12
bipolar input selection 1
(
±
5 V), C-10 to C-11
bipolar input selection 2
(
±
2.5 V), C-11
unipolar input selection 1
(0 to 10 V), C-11
unipolar input selection 2
(0 to 5 V), C-12
base I/O address selection, C-5 to C-9
example switch settings
(figure), C-7
PC bus interface factory settings
(table), C-6