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Chapter 3 Theory of Operation
PC-LPM-16/PnP User Manual 3-2
National Instruments Corporation
Figure 3-1.
PC-LPM-16PnP Block Diagram
PC I/O Channel
PC I/O
Channel
Interface
Plug and
Play
1 MHz
Interrupt
Interface
256-Word
FIFO
MSM82C53
Digital
I/O
12-Bit
Sampling
ADC
Input Mux
16-Channel
Single-Ended
16
8
8
3
Buffer
A/D Timing
Scanning Counter
EXTCONV*
GATE<0..2>
CLK<1..2>
CLK0
OUT0
OUT<0..2>
OUT1 OUT1*
EXTINT*
FROM A/D FIFO
0.5 A
1.0 A
+12 V
-12 V -12 V
+5 V
+12 V
+5 V
I/O Connector
2
3
a.Book : g.chapter 3 Page 2 Wednesday, November 20, 1996 6:36 PM