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PC-LPM-16/PnP User Manual I -4
©
National Instruments Corporation
digital I/O circuitry, 3-8
programming digital I/O circuitry, D-35
DISABDAQ bit, D-7, D-33
documentation
conventions used in manual,
x-xi
National Instruments
documentation,
xi-xii
organization of manual,
ix-x
related documentation,
xii
DOUT<0..7> signal
description (table), 4-3
digital I/O circuitry, 3-8
programming digital I/O circuitry, D-35
E
electronic support services, E-1 to E-2
e-mail support, E-2
environment specifications, A-4
equipment, optional, 1-5
event counting, 4-9 to 4-10
with external switch gating (figure), 4-10
EXTCONV* signal
data acquisition timing circuitry, 3-6
data acquisition timing (figure), 4-9
description (table), 4-4
programming multiple A/D
conversions, D-33 to D-34
EXTINT* bit, D-11
EXTINT* signal
description (table), 4-3
digital I/O circuitry, 3-8
EXTINTEN bit, D-5
F
fax and telephone support, E-2
FaxBack support, E-2
FIFOINTEN bit, D-5, D-35
frequency measurement, 4-10 to 4-11
FTP support, E-1
fuse, self-resetting (table), 4-8
G
GATE signal
counter block diagram, 3-10
general purpose timing and counter
timing, 4-9 to 4-12
timing requirements for GATE and CLK
input signals, 4-11 to 4-12
GATE0 signal (table), 4-4
GATE1 signal (table), 4-4
GATE2 signal (table), 4-4
general purpose timing and counter
timing, 4-9 to 4-12
event counting, 4-9 to 4-10
frequency measurement, 4-10 to 4-11
pulse and square wave generation, 4-9
pulse-width measurement, 4-10
specifications and ratings for MSM82C53
I/O signals, 4-11 to 4-12
time-lapse measurement, 4-10
timing requirements for GATE and CLK
input signals, 4-11 to 4-12
timing specifications for OUT
output signals, 4-11 to 4-12
H
hardware installation, 2-1
I
initializing PC-LPM-16/PnP, D-26 to D-27
input multiplexer, 3-5
installation.
See also
configuration.
PC-LPM-16, C-12
PC-LPM-16PnP
hardware, 2-1
software, 2-2
unpacking, 1-6
integral nonlinearity, A-5
interrupt programming, A/D, D-35