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Appendix D Register-Level Programming
National Instruments Corporation D-21 PC-LPM-16/PnP User Manual
Counter Mode Register
The Counter Mode Register determines the operation mode for each of the three counters
on the MSM82C53 chip. The Counter Mode Register selects the counter involved, the
counter’s read/load mode, its operation mode (that is, any of the six operation modes of
the MSM82C53), and the counting mode (binary or BCD).
The Counter Mode Register is an 8-bit register. Bit descriptions for each of these bits are
included in Appendix B, MSM82C53 Data Sheet.
Address: Base address + 0B (hex)
Type: Write-only
Word Size: 8-bit
Bit Map:
Bit Name Description
7–6 SC<1..0> Counter Select Bits—These bits select the counter on
which the command operates.
7 6 5 4 3 2 1 0
SC1 SC0 RL1 RL0 M2 M1 M0 BCD
SC1 SC0 Operation
0 0 Select counter 1
0 1 Select counter 2
1 0 Select counter 3
1 1 Read-back command
a.Book : l.Appendix D Page 21 Wednesday, November 20, 1996 6:36 PM