National Instruments PC-LPM-16/PnP Switch User Manual


 
Appendix D Register-Level Programming
National Instruments Corporation D-15 PC-LPM-16/PnP User Manual
A/D FIFO Low-Byte Register and A/D FIFO High-Byte Register
The 13-bit A/D conversion results are sign-extended to 16-bit data in two’s complement
format and are stored in a 16-word deep A/D FIFO buffer. Two 8-bit registers, the A/D
FIFO Low-Byte Register and the A/D FIFO High-Byte Register, must be read to return
an A/D conversion value stored in the A/D FIFO. The A/D FIFO Low-Byte Register,
which must be read first, contains the low byte of the 16-bit value, and the A/D FIFO
High-Byte Register contains the high byte of the 16-bit value.
Note:
The A/D FIFO Low-Byte Register
MUST
be read first.
The value read is removed from the A/D FIFO, thereby freeing space to store another A/D
conversion value.
The A/D FIFO is empty after reading all the values it contains. The Status Register should
be checked before the A/D FIFO Register is read. If the A/D FIFO contains one or more
A/D conversion values, the DAVAIL bit is set in the Status Register, and the external
device can read the A/D FIFO Register to retrieve a value. If the DAVAIL bit is cleared,
the A/D FIFO is empty, in which case reading the A/D FIFO Register returns
meaningless information.
The values returned by reading the A/D FIFO Registers are available in two’s
complement binary format. When the analog input range is unipolar, any small negative
value returned from FIFO should be explained as zero.
Address:
A/D FIFO Low-Byte Register Base address + 02 (hex)
A/D FIFO High-Byte Register Base address + 03 (hex)
Type:
Read-only
Word Size:
8-bit
Bit Map:
Two’s complement binary mode
High Byte
{---Sign and Sign Extension Bits---}
Low Byte
7
6 5 4 3 2 1 0
D15 D14 D13 D12 D11 D10 D9 D8
7 6 5 4 3 2 1 0
D7 D6 D5 D4 D3 D2 D1 D0
a.Book : l.Appendix D Page 15 Wednesday, November 20, 1996 6:36 PM