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Description
11-2
11.1 Description
The pulse width modulator (PWM) has two modes: one mode functions as a
tone generator and the the other mode functions as a pulse width modulator.
Figure 11−1. Block Diagram
The PWM/tone generator is controlled and configured by a number of SFRs,
the primary being the PWM Configuration (PWMCON, A1
H
) SFR.
The individual bits of PWMCON have the following functions:
7 6 5 4 3 2 1 0 Reset Value
SFR A1
H
— — PPOL PWMSEL SPDSEL TPCNTL.2 TPCNTL.1 TPCNTL.0 00
H
PPOL (bit 5)—Period Polarity. Specifies the level of the PWM pulse.
0: ON period. PWM Duty register programs the ON period.
1: OFF period. PWM Duty register programs the OFF period.
PWMSEL(bit 4)—PWM Register Select. Select which 16-bit register is ac-
cessed by PWMLOW/PWMHIGH.
0: Period.
1: Duty.
SPDSEL(bit 3)—Speed Select.
0: 1MHz (ONEUSEC Clock).
1: SYSCLK.
TPCNTL(bits 2-0)—Tone Generator/Pulse Width Modulator Control.
TPCNTL.2 TPCNTL.1 TPCNTL.0 Mode
0 0 0 Disable (default)
0 0 1 PWM
0 1 1 Tone—square
1 1 1 Tone—staircase