Agilent Technologies 20ET Network Router User Manual


 
7-7
Operating Concepts
Processing
Pre-Raw Data Arrays
These data arrays store the results of all the preceding data processing operations. (Up to
this point, all processing is performed real-time with the sweep by the IF processor. The
remaining operations are not necessarily synchronized with the sweep, and are performed
by the main processor.) When full 2-port error correction is on, the raw arrays contain all
four S-parameter measurements required for accuracy enhancement. When the channels
are uncoupled ( ), there may be as many as eight raw arrays. These
arrays are directly accessible via GPIB. Notice that the numbers here are still complex
pairs.
Raw Arrays
Raw arrays contain the pre-raw data which has sampler and attenuator offset applied.
Vector Error-correction (Accuracy Enhancement)
Error-correction is performed next, if a measurement calibration has been performed and
correction is activated. Error-correction removes repeatable systematic errors (stored in
the error coefficient arrays) from the raw arrays. This can vary from simple vector
normalization to full 12-term error-correction.
The results of error-correction are stored in the data arrays as complex number pairs.
These are subsequently used whenever correction is on, and are accessible via GPIB.
If the data-to-memory operation is performed, the data arrays are copied into the memory
arrays.
Trace Math Operation
This operation selects either the data array, memory array, or both to continue flowing
through the data processing path. In addition, the complex ratio of the two (data/memory)
or the difference (datamemory) can also be selected. If memory is displayed, the data from
the memory arrays goes through exactly the same processing flow path as the data from
the data arrays.
Gating (Option 010 Only)
This digital filtering operation is associated with time domain transformation. Its purpose
is to mathematically remove unwanted responses isolated in time. In the time domain, this
can be viewed as a time-selective bandpass or bandstop filter. (If both data and memory
are displayed, gating is applied to the memory trace only if gating was on when data was
stored into memory.)
The Electrical Delay Block
This block involves adding or subtracting phase in proportion to frequency. This is
equivalent to "line-stretching" or artificially moving the measurement reference plane.
This block also includes the effects of port extensions as well as electrical delay.
Conversion
This converts the measured S-parameter data to the equivalent complex impedance (Z) or
admittance (Y) values, or to inverse S-parameters (1/S).
COUPLED CH OFF