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2-5
Network Processing Engine and Network Services Engine Installation and Configuration
OL-4448-12
Chapter 2 NPE-175 and NPE-225 Overview
NPE-175 and NPE-225 Memory Information
• SRAM—static random-access memory
• Unified cache— Instruction cache and data cache are combined. For example, a processor may have
primary cache with separate instruction and data cache memory, but unified secondary cache.
NPE-175 and NPE-225 Memory Information
To determine the memory configuration of your NPE, use the show version command.
The following example shows an NPE-225 installed in a Cisco 7206VXR router:
router(boot)# show version
Cisco Internetwork Operating System Software
IOS (tm) 7200 Software (C7200-BOOT-M), Released Version 12.0(19990124:222541)
[biff-nightly 115]
Copyright (c) 1986-1999 by cisco Systems, Inc.
Compiled Mon 15-Feb-99 21:50 by biff
Image text-base:0x600088F8, data-base:0x6064C000
(display text omitted)
cisco 7206VXR (NPE225) processor with 57344K/8192K bytes of memory.
R527x CPU at 262Mhz, Implementation 40, Rev 10.0, 2048KB L2 Cache
6 slot VXR midplane, Version 2.0
(display text omitted)
Table 2-1 provides memory specifications, Table 2-2 provides memory configurations for the NPE-175,
and Table 2-3 provides memory configurations for the NPE-225.
Ta ble 2-1 NPE-175 and NPE-225 Memory Specifications
Memory Type Size Quantity Description
Component
Location on the
NPE-175 and
NPE-225 Board
SDRAM 64 or 128 MB 1 configurable
bank with 1
SDRAM slot
DIMM U15
Boot ROM 512 KB 1 OTP ROM for the ROM monitor
program
U1
Primary cache 16 KB (instruction),
16 KB (data)
— RM5270 processor, primary internal
cache
U4
32 KB (instruction),
32 KB (data)
— RM5271 processor, primary internal
cache
U4
Secondary cache 2 MB 4 x 256 x 18 bits =
64 bit plus 4 parity
bits
RM527x processor, unified external
cache
U5, U6, U7, U8
1
1. Located on the processor engine board.