Cisco Systems NPE-225 Network Card User Manual


 
4-3
Network Processing Engine and Network Services Engine Installation and Configuration
OL-4448-12
Chapter 4 NSE-1 Overview
NSE-1 Description and Overview
System controller
The system controller provides hardware logic to interconnect the processor, DRAM, and the
PCI-based system backplane bus. The NSE-1 has one system controller that provides processor
access to the two midplane and single I/O controller PCI buses. The system controller also allows
port adapters—on either of the two midplane PCI buses—access to SDRAM.
Upgradable memory modules
The NSE-1 uses SDRAM for providing code, data, and packet storage.
Cache memory
The NSE-1 has three levels of cache: primary and secondary cache that are internal to the
microprocessor with secondary unified cache for data and instruction, and tertiary, 2-MB external
cache.
Two environmental sensors for monitoring the cooling air as it leaves the chassis
Boot ROM for storing sufficient code for booting the Cisco IOS software
Note The NSE-1 does not have packet SRAM.
System Management Functions
The NSE-1 performs the following system management functions:
Sending and receiving routing protocol updates
Managing tables, caches, and buffers
Monitoring interface and environmental status
Providing Simple Network Management Protocol (SNMP) management through the console and
Telnet interface
Accounting for and switching of data traffic
Booting and reloading images
Managing port adapters (including recognition and initialization during online insertion and
removal)
Terms and Acronyms
Cache—Memory with fast access and small capacity used to temporarily store recently accessed
data; found either incorporated into the processor or near it.
DIMM—dual in-line memory module
DRAM—dynamic random-access memory
Instruction and data cache—Instructions to the processor, and data on which the instructions work.
Integrated cache—Cache that is built into the processor; sometimes referred to as internal cache.
Cache memory physically located outside the processor is not integrated, and is sometimes referred
to as external cache.
OTP—one time programmable