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3-128 Vol. 2A CMPPD—Compare Packed Double-Precision Floating-Point Values
INSTRUCTION SET REFERENCE, A-M
The greater-than relations that the processor does not implement require more than
one instruction to emulate in software and therefore should not be implemented as
pseudo-ops. (For these, the programmer should reverse the operands of the corre-
sponding less than relations and use move instructions to ensure that the mask is
moved to the correct destination register and that the source operand is left intact.)
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
CASE (COMPARISON PREDICATE) OF
0: OP ← EQ;
1: OP ← LT;
2: OP ← LE;
3: OP ← UNORD;
4: OP ← NEQ;
5: OP ← NLT;
6: OP ← NLE;
7: OP ← ORD;
DEFAULT: Reserved;
CMP0 ← DEST[63:0] OP SRC[63:0];
CMP1 ← DEST[127:64] OP SRC[127:64];
IF CMP0
= TRUE
THEN DEST[63:0] ← FFFFFFFFFFFFFFFFH;
ELSE DEST[63:0] ← 0000000000000000H; FI;
IF CMP1
= TRUE
THEN DEST[127:64] ← FFFFFFFFFFFFFFFFH;
ELSE DEST[127:64] ← 0000000000000000H; FI;
Intel C/C++ Compiler Intrinsic Equivalents
CMPPD for equality __m128d _mm_cmpeq_pd(__m128d a, __m128d b)
CMPPD for less-than __m128d _mm_cmplt_pd(__m128d a, __m128d b)
CMPPD for less-than-or-equal __m128d _mm_cmple_pd(__m128d a, __m128d b)
CMPPD for greater-than __m128d _mm_cmpgt_pd(__m128d a, __m128d b)
CMPPD for greater-than-or-equal__m128d _mm_cmpge_pd(__m128d a, __m128d b)
CMPNLEPD xmm1, xmm2 CMPPD xmm1, xmm2, 6
CMPORDPD xmm1, xmm2 CMPPD xmm1, xmm2, 7
Table 3-8. Pseudo-Op and CMPPD Implementation
Pseudo-Op CMPPD Implementation