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Vol. 2A 3-363
INSTRUCTION SET REFERENCE, A-M
FPREM1—Partial Remainder
The FPREM1 instruction computes the remainder specified in IEEE Standard 754.
This instruction operates differently from the FPREM instruction in the way that it
rounds the quotient of ST(0) divided by ST(1) to an integer (see the “Operation”
section below).
Like the FPREM instruction, FPREM1 computes the remainder through iterative
subtraction, but can reduce the exponent of ST(0) by no more than 63 in one execu-
tion of the instruction. If the instruction succeeds in producing a remainder that is
less than one half the modulus, the operation is complete and the C2 flag in the FPU
status word is cleared. Otherwise, C2 is set, and the result in ST(0) is called the
partial remainder. The exponent of the partial remainder will be less than the expo-
nent of the original dividend by at least 32. Software can re-execute the instruction
(using the partial remainder in ST(0) as the dividend) until C2 is cleared. (Note that
while executing such a remainder-computation loop, a higher-priority interrupting
routine that needs the FPU can force a context switch in-between the instructions in
the loop.)
An important use of the FPREM1 instruction is to reduce the arguments of periodic
functions. When reduction is complete, the instruction stores the three least-signifi-
cant bits of the quotient in the C3, C1, and C0 flags of the FPU status word. This infor-
mation is important in argument reduction for the tangent function (using a modulus
of π/4), because it locates the original angle in the correct one of eight sectors of the
unit circle.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
D ← exponent(ST(0)) – exponent(ST(1));
IF D < 64
THEN
Q ← Integer(RoundTowardNearestInteger(ST(0) / ST(1)));
ST(0) ← ST(0) – (ST(1) ∗ Q);
C2 ← 0;
C0, C3, C1 ← LeastSignificantBits(Q); (* Q2, Q1, Q0 *)
ELSE
C2 ← 1;
N ← An implementation-dependent number between 32 and 63;
QQ ← Integer(TruncateTowardZero((ST(0) / ST(1)) / 2
(D − N)
));
ST(0) ← ST(0) – (ST(1) ∗ QQ ∗ 2
(D − N)
);
FI;
FPU Flags Affected
C0 Set to bit 2 (Q2) of the quotient.
C1 Set to 0 if stack underflow occurred; otherwise, set to least
significant bit of quotient (Q0).