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3-46 Vol. 2A ADDSUBPD—Packed Double-FP Add/Subtract
INSTRUCTION SET REFERENCE, A-M
Operation
xmm1[63:0] = xmm1[63:0] − xmm2/m128[63:0];
xmm1[127:64]
= xmm1[127:64] + xmm2/m128[127:64];
Intel C/C++ Compiler Intrinsic Equivalent
ADDSUBPD __m128d _mm_addsub_pd(__m128d a, __m128d b)
Exceptions
When the source operand is a memory operand, it must be aligned on a 16-byte
boundary or a general-protection exception (#GP) will be generated.
SIMD Floating-Point Exceptions
Overflow, Underflow, Invalid, Precision, Denormal.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#XM For an unmasked Streaming SIMD Extensions numeric excep-
tion, CR4.OSXMMEXCPT[bit 10] = 1.
#UD If CR0.EM is 1.
For an unmasked Streaming SIMD Extensions numeric excep-
tion (CR4.OSXMMEXCPT[bit 10] = 0).
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
If the LOCK prefix is used.
Real Address Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#NM If TS bit in CR0 is 1.
#XM For an unmasked Streaming SIMD Extensions numeric excep-
tion, CR4.OSXMMEXCPT[bit 10] = 1.